IBM and Intel Corp, with support from several technology majors, have developed a proposal codenamed "Geneseo" to enhance PCI Express technology to address performance requirements of new usage models, including visualization and extensible markup language (XML).

"Geneseo" outlines enhancements to facilitate faster connectivity between the computer's brain, namely the processor, and application accelerators, as well as to improve the range of design options available to hardware developers.

The applications that stand to benefit from this proposal include visualization, such as complex weather modeling; math and physics, such as data intensive financial applications; and content processing, such as the encryption and decryption of communications infrastructure data.

Commenting on the new proposal, Dr Tom Bradicich, IBM fellow and chief technology officer - system x and bladecenter servers, said, "IBM is co-founding a new open standard for attaching accelerators and co-processors to server platforms. Like PCI-X, InfiniBand, and PCI Express, this new architecture defines a standards-based approach for improving general purpose server accessibility within new and emerging application areas, such as encryption, visualization, XML and complex mathematical modeling."

Added Pat Gelsinger, senior vice president and general manager - digital enterprise group, Intel, "Five years ago, Intel, along with IBM and other industry leaders, laid out a 10-year vision for an open, standards-based interface for the entire computer industry. In 2004, PCI Express was the first step, and today is the overwhelming choice for desktop, mobile, and server systems. 'Geneseo' is the next step in this vision, and will address new requirements and opportunities that come with next-generation platforms."

"Geneseo" enjoys the support of key companies such as Adaptec, Altera, Broadcom, Cisco Systems, ClearSpeed Technology, Dell, HP, Linux Networx, Novell, Nvidia, Sun Microsystems, Synopsys, Tektronix, etc.

First delivered in client and server computing platforms in 2004, PCI Express technology signals the transition of computing platform I/O from the earlier parallel bus model to a high-speed, serial I/O standard.